The AEC-Q100 Component Technical Committee to define common electrical component qualification requirements. These documents contain detailed qualification and requalification requirements and include unique test methods and guidelines for the use of generic data. Components meeting these specifications are suitable for use in harsh automotive environments without additional component level qualification testing.
The memory works independently from the system’s CPU cycle. The responses from the memory related to read and write requests do not directly corelate to system cycles instead occurring asynchronously.
According to AEC-Q100 the following are automotive temperature ratings: Grade 4 (0°C ~70°C); Grade 3 (-40°C~+85°C); Grade 2 (-40°C~+105°C); Grade 1 (-40°C~+125°C) und Grade 0 (-40°C~+150°C) environmental temperature. There are also components that do not have AEC-Q ratings but support specific temperature ranges. (e.g. grade 2).
Air Way Bill, Tracking number, shipping documents
Ball Grid Array (BGA) is a form of housing in which the connections are arranged in a matrix on the underside of the memory IC. The connections are solder pearls, which are arranged in a grid meaning many connections can be placed in a small area.
Means buffered / decoupled i.e. A circuit decouples the input and output signals, which relieves the load on the input side of the processor or its memory controller.
CFexpress very fast CF card type with PCIe bus interface and NVMe protocol.
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For DRAM typically from 0 ° C to 70 ° C Ta (ambient / environment, DDR1 and smaller) or 0 ° to 95 ° C Tc (case / housing; with DDR2 and higher), for other products, the commercial temperature range can also be -25 ° to + 85 °
Customer Requested Date, Time at which the customer requires the goods.
Customer Sample - Customer samples that are suitable for qualification and correspond to the finished product. In contrast to the engineering sample, which usually works, but does not have all the properties of the finalized product.
Datecode, Date of manufacture formatted as YYWW; for example, 1006, Year 2010, Week 6 or DC09+ : 2009 and newer.
The Dual Inline Package describes a housing for components. In this design, the pins are arranged in two rows on both sides of the component housing. The DIP design is used for memory modules and other active and passive components, and for central processing units (CPU), amplifiers, DIP switches, comparators, resistance networks, LAN controllers, LED units, etc.
Disk on Module (DOM) is a module form of flash memory, which is intended for industrial PCs and for end users. Since the introduction of SSDs (approx. 2009), these devices have only played a role for older devices with an IDE connection. With the help of a DOM as a replacement for commercially available hard disks, a PC can be assembled without moving or noisy parts, if the CPU and power supply are passively cooled and an optical drive is not used.
Dynamic Random Access Memory describes a technology for an electronic random access memory (RAM), which is mainly used in computers, but is also used in other electronic devices such as printers. The storage element is a capacitor that is either charged or discharged. It is accessible via a switching transistor and either read out or written with new content.
The memory content is volatile, which means that the stored information is lost if there is no operating voltage or if it is subsequently refreshed.
Estimated Annual Usage, forecasted annual need for a given product.
Error Correction Code: A type of checksum. Additional data is generated and stored when the user data is stored for the purposes of verifying and possibly correcting the user data during the readout process.
Engineering Sample, an early stage in a product’s lifecycle suitable for initial testing, but potentially not truly representative of the finished product’s complete capabilities.
Extended temperature range e.g. DDR2 / 3/ 4 from -40 ° C to + 95 ° C case temperature.
Joint Electron Device Engineering Council: A large number of companies in the field of semiconductor technology and application have organized themselves under organization in order to define generally applicable standards for electronic semiconductor components.
Abbreviation of Kilohertz, one thousand Hertz – the unit for the frequency of repetitive events per second.
Einheit für die Frequenz sich wiederholender Ereignisse pro Sekunde.
Mature memory technologies, which are still widely used, but have been replaced by further developments in more modern systems.
Low Power SDRAM, also known as Mobile RAM, is an SDRAM developed for use in mobile systems, smartphones, notebooks and PDAs. Retaining the same specifications as standard SDRAM related to memory clock and data transfer rates, it reduces the required voltage supply from 3.3V to 1.8V and has a special power down mode which enables a self-refresh when necessary – this allows it to function for extended periods (days or even weeks) with low power supply.
The original low-power DDR (sometimes retroactively called LPDDR1) is a slightly modified form of DDR SDRAM, with several changes to reduce overall power consumption.
Most significant, the supply voltage is reduced from 2.5 to 1.8 V. Additional savings come from temperature-compensated refresh (DRAM requires refresh less often at low temperatures), partial array self refresh, and a "deep power down" mode which sacrifices all memory contents. Additionally, chips are smaller, using less board space than their non-mobile equivalents.
The next iteration of LPDDR. In addition to higher clock and transfer rates with shorter access times, development also led to further reductions in the supply voltage, from 1.8 to 1.5 volts.
The next iteration of LPDDR2. In addition to higher clock and transfer rates with shorter access times, development also led to further reductions in the supply voltage, from 1.5 to 1.2 volts.
The next iteration of LPDDR3. In addition to higher clock and transfer rates with shorter access times, development also led to further reductions in the supply voltage, from 1.5 to 1.1 volts.
The next iteration of LPDDR4. In addition to higher clock and transfer rates with shorter access times, development also led to further reductions in the supply voltage.
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A classic Multi Chip Package consists of several individual microchips (or dies), which are planar (side by side) or more often stacked inside a common housing. These MCP packages look and function like a single component. These components are not generally recognizable as MCPs without close examination. Today, the term MCM is also applied to modules which in addition to semiconductor dies contain micromechanical elements or discrete passive components such as capacitors or resistors.
MiniRegistered DIMM is a compact design of an RDIMM (DRAM module).
Very low profile - RDIMM in a compact design with a reduced overall height.
Mini Very Low profile unbuffered DIMM is a compact design of a UDIMM (DRAM module).
Multi-Layer (Flash) Cell is a memory cell/element capable of storing more than a single bit of information, compared to a single-level cell (SLC) which can store only one bit per memory cell/element. A memory cell typically consists of a single MOSFET (metal-oxide-semiconductor field-effect transistor), thus multi-level cells reduce the number of MOSFETs required to store the same amount of data as single-level cells.
Minimum Order Quantity
Abbreviation for “Mini Serial Advanced Technology Attachment” - standard. In contrast to SATA (Interface, SATA1, 2 or 3), mSATA is a form factor (JEDEC: MO-300), basically the same as a normal 2.5" SSD without the housing.
Moisture Sensitive Level (1/2/3). Sensitivity to moisture: The component can be processed within the stated periods of time without being damaged during the soldering process.
A non-volatile memory. NAND Flash is organized in blocks and is mainly used in applications that require fast writing and loading of large amounts of data.
Memory which retains content (i.e. data) even without a power supply (FLASH, EEPROM, MRAM etc.). In contrast to volatile memory, which without power supply lose their content (DRAM, SRAM).
A non-volatile memory. The Byte-by-byte addressing enables direct program execution. NOR Flash is mainly used for applications in which the operating system or parts of it are located directly on the flash.
Obsolete products. The process of becoming obsolete or outdated and no longer used or manufactured. Products „Become EOL“ when no further production of that product is planned (End of Life).
An original design manufacturer (ODM) is a company that designs and manufactures a product, as specified, that is eventually rebranded by another firm for sale.
Product Discontinuation Notice
Product Termination Notification
Quad Flat Package describes a widely used housing design for integrated circuits in electronics. The connections (pins) are located on the four sides of the flat housing. QFP are soldered as surface-mounted components on printed circuit boards.
QFP usually have 32 to 200 pins, which are arranged in a pitch of 0.4 to 1 mm. With a smaller number of connections, the Small Outline Package (SOP or SOIC) is used, in which the pins are arranged on two opposite edges. For larger pin numbers, the Ball Grid Array (BGA) is often used, in which the entire underside serves as a connection area.
A direct predecessor of the QFP was the Plastic Leaded Chip Carrier (PLCC), which uses a larger pin spacing of 1.27 mm (50 mil) and has a significantly larger housing height.
Registered (also called buffered) memory modules have a register between the DRAM modules and the system's memory controller. They place less electrical load on the memory controller and allow single systems to remain stable with more memory modules than they would have otherwise.
Serial ATA (Serial ATAttachment) – also abbreviated as SATA and S-ATA, is a computer interface for data exchange with hard drives and other storage devices. ATA stands for the transmission protocol "AT Attachment", in contrast to which the data is transmitted serially with SATA.
Single-level cell memories store one bit in each cell. This leads to faster data transfer, lower energy consumption and an improved lifespan of the cell.
Standard Package Quantity can be in tube, tray or roll – numerical indication of standard package quantity (sealed).
Static random-access memory (static RAM or SRAM) is a type of semiconductor random-access memory (RAM) that uses bistable latching circuitry (flip-flop) to store each bit.
Memory is available in different temperature ranges. The temperature refers to the ambient temperature in which the memory is operated.
The main range ratings are: Commercial temperature (0-70 ° C), industrial temperature (-40-85 ° C) and automotive temperature (-40-125 ° C).
The manufacturer must approve the products for the respective temperature ranges.
Thin Small-Outline Package is the standardized housing shape with connecting pins for DRAM up to SDRAM DDR1 technology. Now largely replaced by BGA housings (Ball Grid Array).
Universal Flash Storage (Media). A storage medium with a Flash controller and flash memory combined in a common housing. Will quickly replace eMMC in high-speed applications.
Ultra Low Profile Registered DIMM; a very compact modular design with a low overall height. It has registers to relieve the address driver lines of the processor unit. Be careful with the height, there is no uniform standard here.
An interface that is particularly popular with servers and mass storage systems in order to connect (U.2) SSDs to the computer system.
U2 without a dot reminds many of the music group of the same name, which has enjoyed worldwide success for over 30 years.
Without buffer. Signal, address and data lines are directly connected between the memory and the processor unit.
Unregistered which indicates the signal, address and data lines are directly connected to the processor and in sync with its clock cycle.
Very Low Profile unbuffered DIMM; a compact modular design with a low overall height. All data, address and control lines are directly connected to the processor unit.
Very Low Profile Registered DIMM; a compact modular design with a low overall height. It has registers to relieve the address driver lines of the processor unit.
Also called 3-dimensional flash. 32, 64 or more individual chips are put together in layers to form a three-dimensional chip construct – as compared to the "planar" or two-dimensional version of multi-chip construction, these forms deliver even higher memory densities.